TCHES 2027, Cycle 1 is open for submissions. Deadline July 15, AOE.

Cryptographic engineer specializing in fast cryptographic implementations — from Cortex-M microcontrollers to Apple-M1/Armv8-A vector units and H100 GPUs — with formal-verification work alongside.

About me

Hi, there. I’m Vincent Hwang (黃柏文). I’m currently (2026-04-01) a Senior Software Engineer at Qinvicta Inc., a startup based in Cambridge, Massachusetts, USA.

I’m a cryptographic engineer: I take the high-level mathematics of (post-quantum) cryptography and turn it into optimized, real-world code. I position myself as a computer scientist who turns high-level ideas into optimized programs — usually through several iterations of algorithmic refinement and hand-written assembly.

More about me: high-performance implementation, formal verification, and current directions.

Selected credentials

16 papers, mostly at TCHES (the field’s top venue), plus IEEE S&P and USENIX Security
Sole author of A Survey of Polynomial Multiplications for Lattice-Based Cryptosystems (CiC 2024)
TCHES 2027 Program Committee / editorial board
27 reviews submitted as a subreviewer / external reviewer (2024 ~ 2026, mostly at TCHES)
17 artifact reviews submitted as an AE member (2023 ~ 2026, mostly TCHES)
PhD in Cryptographic Engineering, advised by Peter Schwabe (樂岩) (Max Planck Institute for Security and Privacy).

Contact

Email: vincentvbh7 at gmail dot com

Curriculum Vitae

Academic CV (version 2026-08-26).
Industry CV (version 2026-08-26).

Details

Education

PhD, Cryptographic Engineering, MPI-SP (Jan. 2023 ~ Apr. 2026); external PhD candidate at Radboud University, defended April 2026.
- Thesis: Software Implementations of Polynomial Multiplications for Lattice-Based Cryptosystems — printed, updated.
MSc., Department of Computer Science and Information Engineering, National Taiwan University (Sept. 2021 ~ Jun. 2022).
- Thesis: Case Studies on Implementing Number-Theoretic Transforms with Armv7-M, Armv7E-M, and Armv8-A — thesis.
BSc., Department of Computer Science and Information Engineering, National Taiwan University (Sept. 2016 ~ Jun. 2021).

Service

Editorial board
- 2027: TCHES 2027, Program Committee / Editorial Board Member.
Reviewer
- 2026: TCHES 2026 (x8), Eurocrypt 2026 (x1), Crypto 2026 (x2).
- 2025: TCHES 2025 (x8), ArcticCrypt 2025 (x1), CT-RSA 2025 (x2), Journal of Cryptographic Engineering (x1).
- 2024: TCHES 2024 (x3), Crypto 2024 (x1).
Artifact evaluation
- 2026: TCHES 2026 (x6), Eurocrypt 2026 (x4).
- 2025: TCHES 2025 (x5).
- 2023: TCHES 2023 (x2).
(xn) = number of reviews submitted.

Publications

Publication list (PDF) (version 2026-08-26).
Google Scholar
DBLP
Authors in alphabetic order
2026:
- Shadowfax: Hybrid Security and Deniability for AKEMs
  - Phillip Gajland, Vincent Hwang, Jonas Janneck
  - USENIX Security 2026, Cycle 1
  - Built the portable reference implementations.
  - paper ePrint code
2025:
- Faster Verification of Faster Implementations: Combining Deductive and Circuit-Based Reasoning in EasyCrypt
  - José Bacelar Almeida, Manuel Barbosa, Gilles Barthe, Gustavo Xavier Delerue Marinho Alves, Luís Esquível, Vincent Hwang, Tiago Oliveira, Hugo Pacheco, Peter Schwabe, Pierre-Yves Strub
  - IEEE Security and Privacy 2025, Cycle 2
  - Contributing author: proposed the compression-function optimizations and wrote that part (multi-team verification effort; not lead author).
  - paper ePrint
- Multiplying Polynomials without Powerful Multiplication Instructions (Long Paper)
  - Vincent Hwang, YoungBeom Kim, and Seog Chung Seo
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2025), Issue 1
  - Proposed and implemented the Cortex-M3 optimizations (generalized multi-limb Barrett multiplication); wrote the whole the paper except for the 8-bit AVR sections.
  - paper slides TCHES artifact code ePrint
2024:
- Formal Verification of Emulated Floating-Point Arithmetic in Falcon
  - Vincent Hwang
  - International Workshop on Security (IWSEC 2024)
  - Sole author — verified, with CryptoLine, the functional equivalence and intermediate value-ranges of Falcon signing’s emulated floating-point add/multiply.
  - paper slides code ePrint
- A Survey of Polynomial Multiplications for Lattice-Based Cryptosystems
  - Vincent Hwang
  - Communications in Cryptology (CiC 2024), Issue 2
  - Sole author — surveyed modular arithmetic, homomorphisms, and vectorization for rings ℤ_q[x]/⟨xⁿ − αx − β⟩.
  - paper code ePrint
- Pushing the Limit of Vectorized Polynomial Multiplication for NTRU Prime
  - Vincent Hwang
  - Australasian Conference for Security and Privacy (ACISP 2024)
  - Sole author — replaced Rader’s FFT with truncated Rader’s FFT; optimized NTRU Prime on Cortex-A72 Neon and Haswell AVX2.
  - paper slides code ePrint
- Algorithmic Views of Vectorized Polynomial Multipliers – NTRU Prime
  - Vincent Hwang, Chi-Ting Liu, and Bo-Yin Yang
  - Applied Cryptography and Network Security (ACNS 2024)
  - Proposed the optimizations and implemented Bruun’s FFT and the fastest variant (Schönhage/Bruun/Good–Thomas/Rader, Cortex-A72 Neon); wrote the paper.
  - paper slides code ePrint
2023:
- Algorithmic Views of Vectorized Polynomial Multipliers – NTRU
  - Han-Ting Chen, Yi-Hua Chung, Vincent Hwang, and Bo-Yin Yang
  - International Conference on Cryptology in India (INDOCRYPT 2023)
  - Proposed the Toom–Cook improvement and the Toeplitz matrix–vector approach; integrated coauthors’ multipliers; wrote the non-implementation parts.
  - paper slides code ePrint
2022:
- Verified NTT Multiplications for NISTPQC KEM Lattice Finalists: Kyber, SABER, and NTRU
  - Vincent Hwang, Jiaxiang Liu, Gregor Seiler, Xiaomu Shi, Ming-Hsien Tsai, Bow-Yaw Wang, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022), Issue 4
  - Rewrote the NTRU Cortex-M4 assembly multiplication and documented its structure; contributing author on the CryptoLine verification (Cortex-M4 and AVX2).
  - paper talk by Bo-Yin Yang slides code
- Multi-Parameter Support with NTTs for NTRU and NTRU Prime on Cortex-M4
  - Erdem Alkim, Vincent Hwang, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022), Issue 4
  - Proposed the optimizations (incomplete Good–Thomas FFT for code size) and wrote the paper.
  - paper talk by myself slides TCHES artifact code ePrint
- Efficient Multiplication of Somewhat Small Integers using Number-Theoretic Transforms (Best Paper Award)
  - Hanno Becker, Vincent Hwang, Matthias J. Kannwischer, Lorenz Panny, and Bo-Yin Yang
  - International Workshop on Security (IWSEC 2022)
  - Contributed to the Cortex-M3 implementation (FFT-vs-schoolbook integer-multiplication crossover ≈ 2048 bits).
  - paper slides code ePrint
- Faster Kyber and Dilithium on the Cortex-M4
  - Amin Abdulrahman, Vincent Hwang, Matthias J. Kannwischer, and Amber Sprenkels
  - Applied Cryptography and Network Security (ACNS 2022)
  - Proposed the Fermat Number Transform for Dilithium’s challenge product and a Kyber base-multiplication optimization; wrote those parts.
  - paper code ePrint
- Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  - Hanno Becker, Vincent Hwang, Matthias J. Kannwischer, Bo-Yin Yang, and Shang-Yi Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022)
  - Implemented the Armv8-A Neon optimizations and wrote those parts (paper introduced the multiplicative Barrett form and the Montgomery–Barrett correspondence).
  - paper talk by Hanno Becker slides TCHES artifact code ePrint
- Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4
  - Amin Abdulrahman, Jiun-Peng Chen, Yu-Jia Chen, Vincent Hwang, Matthias J. Kannwischer, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022)
  - Proposed the ideas; implemented the Cortex-M4 optimizations and the fastest Cortex-M3 approach (incl. masked M4); wrote those parts.
  - paper talk slides slide (updated) TCHES artifact code ePrint
2021:
- NTT Multiplication for NTT-unfriendly Rings
  - Chi-Ming Marvin Chung, Vincent Hwang, Matthias J. Kannwischer, Gregor Seiler, Cheng-Jhih Shih, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2021), Issue 2
  - Deeply involved in the Cortex-M4 implementations (Good–Thomas; speed records for Saber and NTRU on Cortex-M4 and AVX2).
  - paper talk slides TCHES artifact code ePrint
- Polynomial Multiplication in NTRU Prime
  - Erdem Alkim, Dean Yun-Li Cheng, Chi-Ming Marvin Chung, Hülya Evkan, Leo Wei-Lun Huang, Vincent Hwang, Ching-Lin Trista Li, Ruben Niederhagen, Cheng-Jhih Shih, Julian Wälde, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2021), Issue 1
  - Deeply involved in the Good–Thomas implementation (Cortex-M4).
  - paper talk slides TCHES artifact code ePrint

Technical Reports

IACR ePrint
2025:
2024:
2023:
- Barrett Multiplication for Dilithium on Embedded Devices
  - Vincent Hwang, YoungBeom Kim, and Seog Chung Seo
  - IACR ePrint
  - ePrint code
  - This paper was extended into the follow paper:
    - Multiplying Polynomials without Powerful Multiplication Instructions (Long Paper)
- Algorithmic Views of Vectorized Polynomial Multipliers for NTRU and NTRU Prime (Long Paper)
  - Han-Ting Chen, Yi-Hua Chung, Vincent Hwang, Chi-Ting Liu, and Bo-Yin Yang
  - IACR ePrint
  - ePrint
  - This paper was split into the following papers:
    - Algorithmic Views of Vectorized Polynomial Multipliers – NTRU
    - Algorithmic Views of Vectorized Polynomial Multipliers – NTRU Prime

Talks (Conference talks excluded)

2026:
- Implementing Polynomial Multiplications for Lattice-Based Cryptography on Microcontrollers
  - 1st MMU-UTAR Post-Quantum Cryptography Symposium: Standards, Engineering and Applications
  - slides
2025:
- Cryptographic Engineering in Post-Quantum Cryptography
  - Department of Electrical Engineering at National Taiwan University
  - slides
- Artifact Packaging with the Absence of the Target Hardware in Mind
  - OPTIMIST Workshop’25
  - slides
2024:
- Practical Aspects of Schoenhage and Nussbaumer FFTs
  - Institute of Information Science at Academia Sinica
  - slides