TCHES 2027, Cycle 1 is open for submissions. Deadline July 15, AOE.

Cryptographic engineer specializing in fast cryptographic implementations — from Cortex-M microcontrollers to Apple-M1/Armv8-A vector units and H100 GPUs — with formal-verification work alongside.

Hi, there. I’m Vincent Hwang (黃柏文). I’m currently (2026-04-01) a Senior Software Engineer at Qinvicta Inc., a startup based in Cambridge, Massachusetts, USA.

I’m a cryptographic engineer: I take the high-level mathematics of (post-quantum) cryptography and turn it into optimized, real-world code. I position myself as a computer scientist who turns high-level ideas into optimized programs — usually through several iterations of algorithmic refinement and hand-written assembly.

High-performance implementation

My core is the arithmetic of lattice-based schemes – the polynomial multiplications behind NTRU, NTRU Prime, Saber, and the NIST standards ML-KEM and ML-DSA – optimized across a wide range of platforms: Cortex-M3/M4 microcontrollers (including targets without powerful multiplication instructions), Armv8-A Neon on Cortex-A72 and Apple M1, and AVX2 on x86-64. These works draw on a full FFT/NTT toolbox – Good–Thomas (and its incomplete/truncated variants), Rader and truncated Rader, Schönhage, Nussbaumer, Bruun’s FFT, Toeplitz matrix-vector products, and the Fermat number transform – together with the Barrett/Montgomery multiplication. I wrote the field’s survey of polynomial multiplication for lattice-based cryptography (sole-authored, CiC 2024), and I also work at the protocol level (deniable, hybrid post-quantum AKEMs – Shadowfax, USENIX Security 2026).

Formal verification

I’ve also contributed to formal-verification efforts for optimized assembly cryptographic programs, for example, the emulated floating-point arithmetic in Falcon (sole-authored, IWSEC 2024).

Current directions

I’m currently accelerating the elliptic-curve discrete logarithm on H100 GPUs, implementing the NIST standard FN-DSA (Falcon) in assembly, and extending my low-level work to Armv9-A and AVX-512.

Selected credentials

16 papers, mostly at TCHES (the field’s top venue), plus IEEE S&P and USENIX Security
Best Paper Award, IWSEC 2022 — NTT-based integer multiplication
Sole author of *A Survey of Polynomial Multiplications for Lattice-Based Cryptosystems, CiC 2024)
TCHES 2027 Program Committee / editorial board
PhD in cryptographic engineering, advised by Peter Schwabe (樂岩) (Max Planck Institute for Security and Privacy).

Education

PhD, Cryptographic Engineering, MPI-SP (Jan. 2023 ~ March 2026), thesis, errata
MSc., Department of Computer Science and Information Engineering, National Taiwan University (Sept. 2021 ~ Jun. 2022)
BSc., Department of Computer Science and Information Engineering, National Taiwan University (Sept. 2016 ~ Jun. 2021).

Contact

Email: vincentvbh7 at gmail dot com

Curriculum Vitae

Academic CV (version 2026-04-08).
Industry CV (version 2026-04-06).

Service

2027:
- Program Committee/Editorial Board Member of TCHES 2027.
2026:
- Reviewer of TCHES 2026 (x8), Eurocrypt 2026 (x1), Crypto 2026 (x2), Artifact Evaluation Committee Member of TCHES 2026 (x6), Artifact Review Committee of Eurocrypt 2026 (x4)
2025:
- Reviewer of TCHES 2025 (x8), ArcticCrypt 2025 (x1), CT-RSA 2025 (x2), Journal of Cryptographic Engineering (x1)
- Artifact Evaluation Committee Member of TCHES 2025 (x5)
2024:
- Reviewer of Crypto 2024 (x1), TCHES 2024 (x3)
2023:
- Artifact Review Committee Member of TCHES 2023 (x2)

Publications

Google Scholar
DBLP
2026:
- Shadowfax: Hybrid Security and Deniability for AKEMs
  - Phillip Gajland, Vincent Hwang, Jonas Janneck
  - USENIX Security 2026, Cycle 1
  - paper ePrint code
2025:
- Proving Faster Implementations Faster: Combining Deductive and Circuit-Based Reasoning in EasyCrypt
  - José Bacelar Almeida, Manuel Barbosa, Gilles Barthe, Gustavo Xavier Delerue Marinho Alves, Luís Esquível, Vincent Hwang, Tiago Oliveira, Hugo Pacheco, Peter Schwabe, Pierre-Yves Strub
  - IEEE Security and Privacy 2025, Cycle 2
  - paper ePrint
- Multiplying Polynomials without Powerful Multiplication Instructions (Long Paper)
  - Vincent Hwang, YoungBeom Kim, and Seog Chung Seo
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2025), Issue 1
  - paper slides code ePrint
2024:
- Formal Verification of Emulated Floating-Point Arithmetic in Falcon
  - Vincent Hwang
  - International Workshop on Security (IWSEC 2024)
  - paper slides code ePrint
- A Survey of Polynomial Multiplications for Lattice-Based Cryptosystems
  - Vincent Hwang
  - Communications in Cryptology (CiC 2024), Issue 2
  - paper code ePrint
- Pushing the Limit of Vectorized Polynomial Multiplication for NTRU Prime
  - Vincent Hwang
  - Australasian Conference for Security and Privacy (ACISP 2024)
  - paper slides code ePrint
- Algorithmic Views of Vectorized Polynomial Multipliers – NTRU Prime
  - Vincent Hwang, Chi-Ting Liu, and Bo-Yin Yang
  - Applied Cryptography and Network Security (ACNS 2024)
  - paper slides code ePrint
2023:
- Algorithmic Views of Vectorized Polynomial Multipliers – NTRU
  - Han-Ting Chen, Yi-Hua Chung, Vincent Hwang, and Bo-Yin Yang
  - International Conference on Cryptology in India (INDOCRYPT 2023)
  - paper slides code ePrint
2022:
- Verified NTT Multiplications for NISTPQC KEM Lattice Finalists: Kyber, SABER, and NTRU
  - Vincent Hwang, Jiaxiang Liu, Gregor Seiler, Xiaomu Shi, Ming-Hsien Tsai, Bow-Yaw Wang, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022), Issue 4
  - paper talk by Bo-Yin Yang slides code
- Multi-Parameter Support with NTTs for NTRU and NTRU Prime on Cortex-M4
  - Erdem Alkim, Vincent Hwang, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022), Issue 4
  - paper talk by myself slides code ePrint
- Efficient Multiplication of Somewhat Small Integers using Number-Theoretic Transforms (Best Paper Award)
  - Hanno Becker, Vincent Hwang, Matthias J. Kannwischer, Lorenz Panny, and Bo-Yin Yang
  - International Workshop on Security (IWSEC 2022)
  - paper slides code ePrint
- Faster Kyber and Dilithium on the Cortex-M4
  - Amin Abdulrahman, Vincent Hwang, Matthias J. Kannwischer, and Amber Sprenkels
  - Applied Cryptography and Network Security (ACNS 2022)
  - paper code ePrint
- Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  - Hanno Becker, Vincent Hwang, Matthias J. Kannwischer, Bo-Yin Yang, and Shang-Yi Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022)
  - paper talk by Hanno Becker slides code ePrint
- Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4
  - Amin Abdulrahman, Jiun-Peng Chen, Yu-Jia Chen, Vincent Hwang, Matthias J. Kannwischer, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2022)
  - paper talk slides slide (updated) code ePrint
2021:
- NTT Multiplication for NTT-unfriendly Rings
  - Chi-Ming Marvin Chung, Vincent Hwang, Matthias J. Kannwischer, Gregor Seiler, Cheng-Jhih Shih, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2021), Issue 2
  - paper talk slides code ePrint
- Polynomial Multiplication in NTRU Prime
  - Erdem Alkim, Dean Yun-Li Cheng, Chi-Ming Marvin Chung, Hülya Evkan, Leo Wei-Lun Huang, Vincent Hwang, Ching-Lin Trista Li, Ruben Niederhagen, Cheng-Jhih Shih, Julian Wälde, and Bo-Yin Yang
  - IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2021), Issue 1
  - paper talk slides code ePrint

Technical Reports

IACR ePrint
2025:
2024:
2023:
- Barrett Multiplication for Dilithium on Embedded Devices
  - Vincent Hwang, YoungBeom Kim, and Seog Chung Seo
  - IACR ePrint
  - ePrint code
  - This paper was extended into the follow paper:
    - Multiplying Polynomials without Powerful Multiplication Instructions (Long Paper)
- Algorithmic Views of Vectorized Polynomial Multipliers for NTRU and NTRU Prime (Long Paper)
  - Han-Ting Chen, Yi-Hua Chung, Vincent Hwang, Chi-Ting Liu, and Bo-Yin Yang
  - IACR ePrint
  - ePrint
  - This paper was split into the following papers:
    - Algorithmic Views of Vectorized Polynomial Multipliers – NTRU
    - Algorithmic Views of Vectorized Polynomial Multipliers – NTRU Prime

Talks (Conference talks excluded)

2026:
- Implementing Polynomial Multiplications for Lattice-Based Cryptography on Microcontrollers
  - 1st MMU-UTAR Post-Quantum Cryptography Symposium: Standards, Engineering and Applications
  - slides
2025:
- Cryptographic Engineering in Post-Quantum Cryptography
  - Department of Electrical Engineering at National Taiwan University
  - slides
- Artifact Packaging with the Absence of the Target Hardware in Mind
  - OPTIMIST Workshop’25
  - slides
- Practical Aspects of Schoenhage and Nussbaumer FFTs
  - Institute of Information Science at Academia Sinica
  - slides